趙康，教授，博士生導師。深耕集成電路EDA領域(Synthesis)近20年，既有高校工作經曆，又有豐富的國際領軍企業高端産品設計經驗。2009年博士畢業于清華大學計算機系EDA實驗室，之後留校工作兩年，曾主持參與國家自然科學基金、國家博士後基金、十一五核高基重大專項。2011年加盟英特爾研究院，期間參與Intel Clanton處理器、軟硬協同驗證、人工智能機器人等項目。2016年加盟Xilinx(AMD)北京研發中心，領導Xilinx(AMD)的EDA高層次綜合産品團隊，對接全球FPGA領域最先進的HLS産品。2022年加盟伟德betvictor体育官网，專注于集成電路學科的EDA方向，尤其側重數字前端的高層次綜合與邏輯綜合。目前以項目負責人身份牽頭十四五科技部重點研發項目1項，若幹企業合作項目。

詳見個人英文主頁  https://zhaokang-lab.github.io/

主要研究方向

EDA電子設計自動化；FPGA工具；編譯優化；體系結構

代表性成果

· Kang Zhao, Yuchun Ma, et al. Adaptive Selection and Clustering of Partial Reconfiguration Modules for Modern FPGA Design Flow. ACM Transactions on Reconfigurable Technology and Systems. Oct 2022.

· Kang Zhao, Wenbo Shen. Parallel Stimulus Generation Based on Model Checking for Coherence Protocol Verification. IEEE Trans VLSI Systems, Volume: 23, Issue: 99, ISSN: 1063-8210, Dec 2015, pp 1063-8210.

· Jianlei Yang, Liwei Ma, Kang Zhao, Yici Cai, Tin-fook Ngai. Early Stage Real-Time SoC Power Estimation Using RTL Instrumentation. Asia and South Pacific Design Automation Conference (ASP-DAC), 2015.

· Ruining He, Yuchun Ma, Kang Zhao, Jinian Bian, “ISBA: An Independent Set-Based Algorithm for Automated Partial Reconfiguration Module Generation”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2012, pp.500-507.

· Kang Zhao, Jinian Bian. Pruning-Based Trace Signal Selection Algorithm for Data Acquisition in Post-Silicon Validation. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. Vol.E95-A (No.6), 2012: 1030-1040.

· Jiliang Zhang, Yongqiang Lu, Qiang Zhou, Qiang Wu, Yaping Lin, and Kang Zhao. TimeFastPlace: Critical path Based timing driven FastPlace. IEICE Electronics Express, Vol.9, No.16, 2012.

· Kang Zhao, Jinian Bian. Pruning-based Trace Signal Selection Algorithm. Asia and South Pacific Design Automation Conference (ASP-DAC). Yokohama, 2011.

· Kang Zhao, Jinian Bian. Processor Accelerator Customization through DFG Exploration. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, Vol.E94-A (No.7), 2011: 1540-1552.

· Kang Zhao, Jinian Bian. Peeling Algorithm for Custom Instruction Identification. IEEE Asia Pacific Conference on Circuits and Systems. Kuala Lumpur, Malaysia, Dec 2010.

· Kang Zhao, Jinian Bian, and et al. Pipeline-based Partition Exploration for Heterogeneous Multiprocessor Synthesis. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, Vol.E92-A (No.9), 2009: 2283-2294.

· Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song, Satoshi Goto. Exploring Partitions based on Search Space Smoothing for Heterogeneous Multiprocessor System. IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, Vol.E91-A (No.9), 2008: 2456-2464.

· Kang Zhao, Jinian Bian, et al. Fast Custom Instruction Identification Algorithm based on Basic Convex Pattern Model for Supporting ASIP Automated Design. IEICE Trans. on Fundamentals of Electronics Communications and Computer Sciences, Vol.E91-A (No.6), June 2008: 1478-1487.

· Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song, Satoshi Goto. HyMacs: Hybrid Memory Access Optimization based on Custom-instruction Scheduling. Proceedings of ACM Great Lakes Symposium on VLSI, Orlando, USA, May 2008: 89-94.

· Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song, Satoshi Goto. Automated Specific Instruction Customization Methodology for Multimedia Processor Acceleration. Proceedings of International Symposium on Quality Electronic Design, San Jose, CA, March 2008: 321-324.

· 趙康, 邊計年, 董社勤. 基于集束式整數線性規劃模型的專用指令集自動定制. 計算機輔助設計與圖形學學報(JCAD), 19(10), 2007.10: 1229-1234. (EI)